OpenSSL 1.1.1-pre2
This commit is contained in:
Hakase
+66
-27
@@ -65,8 +65,8 @@ $flavour = shift || "o32"; # supported flavours are o32,n32,64,nubi32,nubi64
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if ($flavour =~ /64|n32/i) {
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$PTR_LA="dla";
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$PTR_ADD="dadd"; # incidentally works even on n32
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$PTR_SUB="dsub"; # incidentally works even on n32
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$PTR_ADD="daddu"; # incidentally works even on n32
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$PTR_SUB="dsubu"; # incidentally works even on n32
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$PTR_INS="dins";
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$REG_S="sd";
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$REG_L="ld";
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@@ -74,8 +74,8 @@ if ($flavour =~ /64|n32/i) {
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$SZREG=8;
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} else {
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$PTR_LA="la";
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$PTR_ADD="add";
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$PTR_SUB="sub";
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$PTR_ADD="addu";
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$PTR_SUB="subu";
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$PTR_INS="ins";
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$REG_S="sw";
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$REG_L="lw";
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@@ -102,15 +102,9 @@ open STDOUT,">$output";
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my ($MSB,$LSB)=(0,3); # automatically converted to little-endian
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$code.=<<___;
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#include "mips_arch.h"
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.text
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#ifdef OPENSSL_FIPSCANISTER
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# include <openssl/fipssyms.h>
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#endif
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#if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
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#define _MIPS_ARCH_MIPS32R2
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#endif
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#if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
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.option pic2
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#endif
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@@ -126,7 +120,7 @@ my ($i0,$i1,$i2,$i3)=($at,$t0,$t1,$t2);
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my ($t0,$t1,$t2,$t3,$t4,$t5,$t6,$t7,$t8,$t9,$t10,$t11) = map("\$$_",(12..23));
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my ($key0,$cnt)=($gp,$fp);
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# instuction ordering is "stolen" from output from MIPSpro assembler
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# instruction ordering is "stolen" from output from MIPSpro assembler
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# invoked with -mips3 -O3 arguments...
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$code.=<<___;
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.align 5
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@@ -146,7 +140,7 @@ _mips_AES_encrypt:
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xor $s2,$t2
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xor $s3,$t3
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sub $cnt,1
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subu $cnt,1
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#if defined(__mips_smartmips)
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ext $i0,$s1,16,8
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.Loop_enc:
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@@ -218,7 +212,7 @@ _mips_AES_encrypt:
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xor $t2,$t6
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xor $t3,$t7
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key0,16
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xor $s0,$t0
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xor $s1,$t1
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@@ -409,7 +403,7 @@ _mips_AES_encrypt:
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xor $t2,$t6
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xor $t3,$t7
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key0,16
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xor $s0,$t0
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xor $s1,$t1
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@@ -657,6 +651,12 @@ $code.=<<___;
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.set reorder
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$PTR_LA $Tbl,AES_Te # PIC-ified 'load address'
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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lw $s0,0($inp)
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lw $s1,4($inp)
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lw $s2,8($inp)
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lw $s3,12($inp)
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#else
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lwl $s0,0+$MSB($inp)
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lwl $s1,4+$MSB($inp)
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lwl $s2,8+$MSB($inp)
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@@ -665,9 +665,16 @@ $code.=<<___;
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lwr $s1,4+$LSB($inp)
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lwr $s2,8+$LSB($inp)
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lwr $s3,12+$LSB($inp)
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#endif
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bal _mips_AES_encrypt
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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sw $s0,0($out)
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sw $s1,4($out)
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sw $s2,8($out)
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sw $s3,12($out)
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#else
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swr $s0,0+$LSB($out)
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swr $s1,4+$LSB($out)
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swr $s2,8+$LSB($out)
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@@ -676,6 +683,7 @@ $code.=<<___;
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swl $s1,4+$MSB($out)
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swl $s2,8+$MSB($out)
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swl $s3,12+$MSB($out)
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#endif
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.set noreorder
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$REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
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@@ -720,7 +728,7 @@ _mips_AES_decrypt:
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xor $s2,$t2
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xor $s3,$t3
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sub $cnt,1
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subu $cnt,1
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#if defined(__mips_smartmips)
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ext $i0,$s3,16,8
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.Loop_dec:
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@@ -792,7 +800,7 @@ _mips_AES_decrypt:
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xor $t2,$t6
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xor $t3,$t7
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key0,16
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xor $s0,$t0
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xor $s1,$t1
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@@ -985,7 +993,7 @@ _mips_AES_decrypt:
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xor $t2,$t6
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xor $t3,$t7
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key0,16
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xor $s0,$t0
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xor $s1,$t1
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@@ -1228,6 +1236,12 @@ $code.=<<___;
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.set reorder
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$PTR_LA $Tbl,AES_Td # PIC-ified 'load address'
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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lw $s0,0($inp)
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lw $s1,4($inp)
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lw $s2,8($inp)
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lw $s3,12($inp)
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#else
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lwl $s0,0+$MSB($inp)
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lwl $s1,4+$MSB($inp)
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lwl $s2,8+$MSB($inp)
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@@ -1236,9 +1250,16 @@ $code.=<<___;
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lwr $s1,4+$LSB($inp)
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lwr $s2,8+$LSB($inp)
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lwr $s3,12+$LSB($inp)
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#endif
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bal _mips_AES_decrypt
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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sw $s0,0($out)
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sw $s1,4($out)
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sw $s2,8($out)
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sw $s3,12($out)
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#else
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swr $s0,0+$LSB($out)
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swr $s1,4+$LSB($out)
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swr $s2,8+$LSB($out)
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@@ -1247,6 +1268,7 @@ $code.=<<___;
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swl $s1,4+$MSB($out)
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swl $s2,8+$MSB($out)
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swl $s3,12+$MSB($out)
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#endif
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.set noreorder
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$REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
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@@ -1295,35 +1317,52 @@ _mips_AES_set_encrypt_key:
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$PTR_ADD $rcon,$Tbl,256
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.set reorder
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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lw $rk0,0($inp) # load 128 bits
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lw $rk1,4($inp)
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lw $rk2,8($inp)
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lw $rk3,12($inp)
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#else
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lwl $rk0,0+$MSB($inp) # load 128 bits
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lwl $rk1,4+$MSB($inp)
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lwl $rk2,8+$MSB($inp)
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lwl $rk3,12+$MSB($inp)
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li $at,128
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lwr $rk0,0+$LSB($inp)
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lwr $rk1,4+$LSB($inp)
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lwr $rk2,8+$LSB($inp)
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lwr $rk3,12+$LSB($inp)
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#endif
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li $at,128
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.set noreorder
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beq $bits,$at,.L128bits
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li $cnt,10
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.set reorder
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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lw $rk4,16($inp) # load 192 bits
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lw $rk5,20($inp)
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#else
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lwl $rk4,16+$MSB($inp) # load 192 bits
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lwl $rk5,20+$MSB($inp)
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li $at,192
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lwr $rk4,16+$LSB($inp)
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lwr $rk5,20+$LSB($inp)
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#endif
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li $at,192
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.set noreorder
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beq $bits,$at,.L192bits
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li $cnt,8
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.set reorder
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#if defined(_MIPS_ARCH_MIPS32R6) || defined(_MIPS_ARCH_MIPS64R6)
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lw $rk6,24($inp) # load 256 bits
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lw $rk7,28($inp)
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#else
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lwl $rk6,24+$MSB($inp) # load 256 bits
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lwl $rk7,28+$MSB($inp)
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li $at,256
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lwr $rk6,24+$LSB($inp)
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lwr $rk7,28+$LSB($inp)
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#endif
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li $at,256
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.set noreorder
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beq $bits,$at,.L256bits
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li $cnt,7
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@@ -1353,7 +1392,7 @@ _mips_AES_set_encrypt_key:
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sw $rk1,4($key)
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sw $rk2,8($key)
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sw $rk3,12($key)
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key,16
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_bias $i0,24
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@@ -1410,7 +1449,7 @@ _mips_AES_set_encrypt_key:
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sw $rk3,12($key)
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sw $rk4,16($key)
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sw $rk5,20($key)
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sub $cnt,1
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subu $cnt,1
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$PTR_ADD $key,24
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_bias $i0,24
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@@ -1471,7 +1510,7 @@ _mips_AES_set_encrypt_key:
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sw $rk5,20($key)
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sw $rk6,24($key)
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sw $rk7,28($key)
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sub $cnt,1
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subu $cnt,1
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_bias $i0,24
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_bias $i1,16
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@@ -1653,7 +1692,7 @@ $code.=<<___;
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lw $tp1,16($key) # modulo-scheduled
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lui $x80808080,0x8080
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sub $cnt,1
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subu $cnt,1
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or $x80808080,0x8080
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sll $cnt,2
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$PTR_ADD $key,16
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@@ -1716,7 +1755,7 @@ $code.=<<___;
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lw $tp1,4($key) # modulo-scheduled
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xor $tpe,$tp2
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#endif
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sub $cnt,1
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subu $cnt,1
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sw $tpe,0($key)
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$PTR_ADD $key,4
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bnez $cnt,.Lmix
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