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@@ -142,7 +142,6 @@ ___
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$code=<<___;
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#include "arm_arch.h"
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.text
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#if defined(__thumb2__) || defined(__clang__)
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.syntax unified
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#define ldrplb ldrbpl
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@@ -154,6 +153,8 @@ $code=<<___;
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.code 32
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#endif
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.text
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.type rem_4bit,%object
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.align 5
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rem_4bit:
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@@ -529,6 +529,7 @@ $code.=<<___;
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.type gcm_init_clmul,\@abi-omnipotent
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.align 16
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gcm_init_clmul:
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.cfi_startproc
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.L_init_clmul:
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___
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$code.=<<___ if ($win64);
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@@ -598,6 +599,7 @@ $code.=<<___ if ($win64);
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___
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$code.=<<___;
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ret
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.cfi_endproc
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.size gcm_init_clmul,.-gcm_init_clmul
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___
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}
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@@ -609,6 +611,7 @@ $code.=<<___;
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.type gcm_gmult_clmul,\@abi-omnipotent
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.align 16
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gcm_gmult_clmul:
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.cfi_startproc
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.L_gmult_clmul:
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movdqu ($Xip),$Xi
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movdqa .Lbswap_mask(%rip),$T3
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@@ -645,6 +648,7 @@ $code.=<<___;
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pshufb $T3,$Xi
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movdqu $Xi,($Xip)
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ret
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.cfi_endproc
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.size gcm_gmult_clmul,.-gcm_gmult_clmul
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___
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}
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@@ -658,6 +662,7 @@ $code.=<<___;
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.type gcm_ghash_clmul,\@abi-omnipotent
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.align 32
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gcm_ghash_clmul:
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.cfi_startproc
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.L_ghash_clmul:
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___
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$code.=<<___ if ($win64);
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@@ -1005,6 +1010,7 @@ $code.=<<___ if ($win64);
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___
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$code.=<<___;
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ret
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.cfi_endproc
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.size gcm_ghash_clmul,.-gcm_ghash_clmul
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___
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}
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@@ -1014,6 +1020,7 @@ $code.=<<___;
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.type gcm_init_avx,\@abi-omnipotent
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.align 32
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gcm_init_avx:
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.cfi_startproc
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___
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if ($avx) {
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my ($Htbl,$Xip)=@_4args;
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@@ -1142,11 +1149,13 @@ $code.=<<___ if ($win64);
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___
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$code.=<<___;
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ret
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.cfi_endproc
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.size gcm_init_avx,.-gcm_init_avx
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___
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} else {
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$code.=<<___;
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jmp .L_init_clmul
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.cfi_endproc
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.size gcm_init_avx,.-gcm_init_avx
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___
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}
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@@ -1156,7 +1165,9 @@ $code.=<<___;
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.type gcm_gmult_avx,\@abi-omnipotent
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.align 32
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gcm_gmult_avx:
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.cfi_startproc
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jmp .L_gmult_clmul
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.cfi_endproc
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.size gcm_gmult_avx,.-gcm_gmult_avx
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___
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@@ -1165,6 +1176,7 @@ $code.=<<___;
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.type gcm_ghash_avx,\@abi-omnipotent
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.align 32
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gcm_ghash_avx:
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.cfi_startproc
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___
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if ($avx) {
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my ($Xip,$Htbl,$inp,$len)=@_4args;
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@@ -1577,11 +1589,13 @@ $code.=<<___ if ($win64);
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___
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$code.=<<___;
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ret
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.cfi_endproc
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.size gcm_ghash_avx,.-gcm_ghash_avx
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___
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} else {
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$code.=<<___;
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jmp .L_ghash_clmul
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.cfi_endproc
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.size gcm_ghash_avx,.-gcm_ghash_avx
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___
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}
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@@ -66,18 +66,26 @@ $inc="x12";
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{
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my ($Xl,$Xm,$Xh,$IN)=map("q$_",(0..3));
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my ($t0,$t1,$t2,$xC2,$H,$Hhl,$H2)=map("q$_",(8..14));
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my $_byte = ($flavour =~ /win/ ? "DCB" : ".byte");
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$code=<<___;
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#include "arm_arch.h"
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#if __ARM_MAX_ARCH__>=7
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.text
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___
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$code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
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$code.=<<___ if ($flavour !~ /64/);
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$code.=".arch armv8-a+crypto\n.text\n" if ($flavour =~ /64/);
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$code.=<<___ if ($flavour !~ /64/);
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.fpu neon
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.code 32
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#undef __thumb2__
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#ifdef __thumb2__
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.syntax unified
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.thumb
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# define INST(a,b,c,d) $_byte c,0xef,a,b
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#else
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.code 32
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# define INST(a,b,c,d) $_byte a,b,c,0xf2
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#endif
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.text
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___
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################################################################################
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@@ -752,7 +760,7 @@ if ($flavour =~ /64/) { ######## 64-bit code
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# since ARMv7 instructions are always encoded little-endian.
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# correct solution is to use .inst directive, but older
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# assemblers don't implement it:-(
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sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
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sprintf "INST(0x%02x,0x%02x,0x%02x,0x%02x)\t@ %s %s",
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$word&0xff,($word>>8)&0xff,
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($word>>16)&0xff,($word>>24)&0xff,
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$mnemonic,$arg;
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@@ -767,13 +775,17 @@ if ($flavour =~ /64/) { ######## 64-bit code
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# fix up remaining new-style suffixes
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s/\],#[0-9]+/]!/o;
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s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
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s/cclr\s+([^,]+),\s*([a-z]+)/mov.$2 $1,#0/o or
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s/vdup\.32\s+(.*)/unvdup32($1)/geo or
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s/v?(pmull2?)\.p64\s+(.*)/unvpmullp64($1,$2)/geo or
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s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo or
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s/^(\s+)b\./$1b/o or
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s/^(\s+)ret/$1bx\tlr/o;
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if (s/^(\s+)mov\.([a-z]+)/$1mov$2/) {
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print " it $2\n";
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}
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print $_,"\n";
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}
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}
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