Latest update.
This commit is contained in:
@@ -49,7 +49,7 @@ my $globl = sub {
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/osx/ && do { $name = "_$name";
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last;
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};
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/linux.*(32|64le)/
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/linux.*(32|64(le|v2))/
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&& do { $ret .= ".globl $name";
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if (!$$type) {
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$ret .= "\n.type $name,\@function";
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@@ -80,7 +80,7 @@ my $globl = sub {
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};
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my $text = sub {
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my $ret = ($flavour =~ /aix/) ? ".csect\t.text[PR],7" : ".text";
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$ret = ".abiversion 2\n".$ret if ($flavour =~ /linux.*64le/);
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$ret = ".abiversion 2\n".$ret if ($flavour =~ /linux.*64(le|v2)/);
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$ret;
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};
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my $machine = sub {
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@@ -186,7 +186,7 @@ my $vmr = sub {
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# Some ABIs specify vrsave, special-purpose register #256, as reserved
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# for system use.
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my $no_vrsave = ($flavour =~ /aix|linux64le/);
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my $no_vrsave = ($flavour =~ /aix|linux64(le|v2)/);
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my $mtspr = sub {
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my ($f,$idx,$ra) = @_;
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if ($idx == 256 && $no_vrsave) {
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@@ -320,7 +320,7 @@ while($line=<>) {
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if ($label) {
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my $xlated = ($GLOBALS{$label} or $label);
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print "$xlated:";
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if ($flavour =~ /linux.*64le/) {
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if ($flavour =~ /linux.*64(le|v2)/) {
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if ($TYPES{$label} =~ /function/) {
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printf "\n.localentry %s,0\n",$xlated;
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}
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+71
-38
@@ -18,14 +18,14 @@ use Carp qw(confess);
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use Exporter qw(import);
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our @EXPORT=qw(PERLASM_BEGIN PERLASM_END);
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our @EXPORT_OK=qw(AUTOLOAD LABEL INCLUDE stfle);
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our @EXPORT_OK=qw(AUTOLOAD LABEL INCLUDE stfle stck);
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our %EXPORT_TAGS=(
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# long-displacement facility
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LD => [qw(clgfi)],
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# store-clock-fast facility
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SCF => [qw(stckf)],
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# general-instruction-extension facility
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GE => [qw(risbg)],
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# extended-immediate facility
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EI => [qw(lt)],
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EI => [qw(clfi clgfi lt)],
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# miscellaneous-instruction-extensions facility 1
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MI1 => [qw(risbgn)],
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# message-security assist
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@@ -36,6 +36,8 @@ our %EXPORT_TAGS=(
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MSA5 => [qw(ppno prno)],
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# message-security-assist extension 8
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MSA8 => [qw(kma)],
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# message-security-assist extension 9
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MSA9 => [qw(kdsa)],
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# vector facility
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VX => [qw(vgef vgeg vgbm vzero vone vgm vgmb vgmh vgmf vgmg
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vl vlr vlrep vlrepb vlreph vlrepf vlrepg vleb vleh vlef vleg vleib
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@@ -102,7 +104,7 @@ our %EXPORT_TAGS=(
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VXD => [qw(vlrlr vlrl vstrlr vstrl vap vcp vcvb vcvbg vcvd vcvdg vdp
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vlip vmp vmsp vpkz vpsop vrp vsdp vsrp vsp vtp vupkz)],
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);
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Exporter::export_ok_tags(qw(LD GE EI MI1 MSA MSA4 MSA5 MSA8 VX VXE VXD));
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Exporter::export_ok_tags(qw(SCF GE EI MI1 MSA MSA4 MSA5 MSA8 MSA9 VX VXE VXD));
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our $AUTOLOAD;
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@@ -130,7 +132,7 @@ sub AUTOLOAD {
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confess(err("PARSE")) if (grep(!defined($_),@_));
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my $token;
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for ($AUTOLOAD) {
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$token=".$1" if (/^.*::([A-Z_]+)$/); # uppercase: directive
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$token=lc(".$1") if (/^.*::([A-Z_]+)$/);# uppercase: directive
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$token="\t$1" if (/^.*::([a-z]+)$/); # lowercase: mnemonic
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confess(err("PARSE")) if (!defined($token));
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}
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@@ -159,7 +161,24 @@ sub stfle {
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S(0xb2b0,@_);
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}
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# MISC
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sub stck {
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confess(err("ARGNUM")) if ($#_!=0);
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S(0xb205,@_);
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}
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# store-clock-fast facility
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sub stckf {
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confess(err("ARGNUM")) if ($#_!=0);
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S(0xb27c,@_);
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}
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# extended-immediate facility
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sub clfi {
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confess(err("ARGNUM")) if ($#_!=1);
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RILa(0xc2f,@_);
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}
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sub clgfi {
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confess(err("ARGNUM")) if ($#_!=1);
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@@ -171,11 +190,15 @@ sub lt {
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RXYa(0xe312,@_);
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}
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# general-instruction-extension facility
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sub risbg {
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confess(err("ARGNUM")) if ($#_<3||$#_>4);
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RIEf(0xec55,@_);
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}
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# miscellaneous-instruction-extensions facility 1
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sub risbgn {
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confess(err("ARGNUM")) if ($#_<3||$#_>4);
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RIEf(0xec59,@_);
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@@ -248,6 +271,13 @@ sub kma {
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RRFb(0xb929,@_);
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}
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# MSA9
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sub kdsa {
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confess(err("ARGNUM")) if ($#_!=1);
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RRE(0xb93a,@_);
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}
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# VX - Support Instructions
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sub vgef {
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@@ -2537,7 +2567,7 @@ sub RIEf {
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$out.=sprintf("%#06x",(($opcode>>8)<<8|$r1<<4|$r2)).",";
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$out.=sprintf("%#06x",($i3<<8)|$i4).",";
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$out.=sprintf("%#06x",($i5<<8)|($opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub RILa {
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@@ -2551,7 +2581,7 @@ sub RILa {
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$out.=sprintf("%#06x",(($opcode>>4)<<8|$r1<<4|($opcode&0xf))).",";
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$out.=sprintf("%#06x",($i2>>16)).",";
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$out.=sprintf("%#06x",($i2&0xffff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub RRE {
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@@ -2562,7 +2592,10 @@ sub RRE {
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my ($opcode,$r1,$r2)=(shift,get_R(shift),get_R(shift));
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$out.="\t.long\t".sprintf("%#010x",($opcode<<16|$r1<<4|$r2));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn";
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# RRE can have 0 ops e.g., pcc.
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$out.="\t$ops" if ((defined($ops))&&($ops ne ''));
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$out.="\n";
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}
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sub RRFb {
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@@ -2575,7 +2608,7 @@ sub RRFb {
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$out.="\t.long\t"
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.sprintf("%#010x",($opcode<<16|$r3<<12|$m4<<8|$r1<<4|$r2));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub RXYa {
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@@ -2589,7 +2622,7 @@ sub RXYa {
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$out.=sprintf("%#06x",(($opcode>>8)<<8|$r1<<4|$x2)).",";
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$out.=sprintf("%#06x",($b2<<12|($d2&0xfff))).",";
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$out.=sprintf("%#06x",(($d2>>12)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub S {
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@@ -2600,7 +2633,7 @@ sub S {
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my ($opcode,$d2,$b2)=(shift,get_DB(shift));
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$out.="\t.long\t".sprintf("%#010x",($opcode<<16|$b2<<12|$d2));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIa {
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@@ -2615,7 +2648,7 @@ sub VRIa {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)).",";
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$out.=sprintf("%#06x",$i2).",";
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$out.=sprintf("%#06x",($m3<<12|RXB($v1)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIb {
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@@ -2630,7 +2663,7 @@ sub VRIb {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)).",";
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$out.=sprintf("%#06x",($i2<<8|$i3)).",";
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$out.=sprintf("%#06x",($m4<<12|RXB($v1)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIc {
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@@ -2645,7 +2678,7 @@ sub VRIc {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|($v3&0xf)).",";
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$out.=sprintf("%#06x",$i2).",";
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$out.=sprintf("%#06x",($m4<<12|RXB($v1,$v3)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRId {
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@@ -2660,7 +2693,7 @@ sub VRId {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|($v2&0xf)).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$i4)).",";
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$out.=sprintf("%#06x",($m5<<12|RXB($v1,$v2,$v3)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIe {
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@@ -2675,7 +2708,7 @@ sub VRIe {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|($v2&0xf)).",";
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$out.=sprintf("%#06x",($i3<<4|$m5)).",";
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$out.=sprintf("%#06x",($m4<<12|RXB($v1,$v2)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIf {
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@@ -2690,7 +2723,7 @@ sub VRIf {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|($v2&0xf)).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$m5<<4)|$i4>>4).",";
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$out.=sprintf("%#06x",(($i4&0xf)<<12|RXB($v1,$v2,$v3)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIg {
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@@ -2705,7 +2738,7 @@ sub VRIg {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|($v2&0xf)).",";
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$out.=sprintf("%#06x",($i4<<8|$m5<<4|$i3>>4)).",";
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$out.=sprintf("%#06x",(($i3&0xf)<<12|RXB($v1,$v2)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIh {
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@@ -2720,7 +2753,7 @@ sub VRIh {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)).",";
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$out.=sprintf("%#06x",$i2).",";
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$out.=sprintf("%#06x",($i3<<12|RXB($v1)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRIi {
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@@ -2735,7 +2768,7 @@ sub VRIi {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4)|$r2).",";
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$out.=sprintf("%#06x",($m4<<4|$i3>>4)).",";
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$out.=sprintf("%#06x",(($i3&0xf)<<12|RXB($v1)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRa {
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@@ -2750,7 +2783,7 @@ sub VRRa {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
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$out.=sprintf("%#06x",($m5<<4|$m4)).",";
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$out.=sprintf("%#06x",($m3<<12|RXB($v1,$v2)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRb {
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@@ -2765,7 +2798,7 @@ sub VRRb {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$m5<<4)).",";
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$out.=sprintf("%#06x",($m4<<12|RXB($v1,$v2,$v3)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRc {
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@@ -2780,7 +2813,7 @@ sub VRRc {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$m6<<4|$m5)).",";
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$out.=sprintf("%#06x",($m4<<12|RXB($v1,$v2,$v3)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRd {
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@@ -2795,7 +2828,7 @@ sub VRRd {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$m5<<8|$m6<<4)).",";
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$out.=sprintf("%#06x",(($v4&0xf)<<12|RXB($v1,$v2,$v3,$v4)<<8|$opcode&0xff));
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRe {
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@@ -2810,7 +2843,7 @@ sub VRRe {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
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$out.=sprintf("%#06x",(($v3&0xf)<<12|$m6<<8|$m5)).",";
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$out.=sprintf("%#06x",(($v4&0xf)<<12|RXB($v1,$v2,$v3,$v4)<<8|$opcode&0xff));
|
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
|
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}
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sub VRRf {
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@@ -2825,7 +2858,7 @@ sub VRRf {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|$r2)).",";
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$out.=sprintf("%#06x",($r3<<12)).",";
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$out.=sprintf("%#06x",(RXB($v1)<<8|$opcode&0xff));
|
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
|
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}
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sub VRRg {
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@@ -2839,7 +2872,7 @@ sub VRRg {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf))).",";
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$out.=sprintf("%#06x",0x0000).",";
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$out.=sprintf("%#06x",(RXB(0,$v1)<<8|$opcode&0xff));
|
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$out.="\t# $memn\t$ops\n"
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRh {
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||||
@@ -2854,7 +2887,7 @@ sub VRRh {
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$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf))).",";
|
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$out.=sprintf("%#06x",(($v2&0xf)<<12|$m3<<4)).",";
|
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$out.=sprintf("%#06x",(RXB(0,$v1,$v2)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
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$out.="\t# $memn\t$ops\n";
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}
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sub VRRi {
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@@ -2869,7 +2902,7 @@ sub VRRi {
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$out.=sprintf("%#06x",($opcode&0xff00|$r1<<4|($v2&0xf))).",";
|
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$out.=sprintf("%#06x",($m3<<4))."\,";
|
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$out.=sprintf("%#06x",(RXB(0,$v2)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
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$out.="\t# $memn\t$ops\n";
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}
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sub VRSa {
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||||
@@ -2884,7 +2917,7 @@ sub VRSa {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v3&0xf))).",";
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$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",($m4<<12|RXB($v1,$v3)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
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||||
}
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||||
|
||||
sub VRSb {
|
||||
@@ -2899,7 +2932,7 @@ sub VRSb {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|$r3)).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",($m4<<12|RXB($v1)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
sub VRSc {
|
||||
@@ -2914,7 +2947,7 @@ sub VRSc {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|$r1<<4|($v3&0xf))).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",($m4<<12|RXB(0,$v3)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
sub VRSd {
|
||||
@@ -2929,7 +2962,7 @@ sub VRSd {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|$r3)).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",(($v1&0xf)<<12|RXB(0,0,0,$v1)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
sub VRV {
|
||||
@@ -2944,7 +2977,7 @@ sub VRV {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($v2&0xf))).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",($m3<<12|RXB($v1,$v2)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
sub VRX {
|
||||
@@ -2959,7 +2992,7 @@ sub VRX {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|($v1&0xf)<<4|($x2))).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",($m3<<12|RXB($v1)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
sub VSI {
|
||||
@@ -2974,7 +3007,7 @@ sub VSI {
|
||||
$out.=sprintf("%#06x",($opcode&0xff00|$i3)).",";
|
||||
$out.=sprintf("%#06x",($b2<<12|$d2)).",";
|
||||
$out.=sprintf("%#06x",(($v1&0xf)<<12|RXB(0,0,0,$v1)<<8|$opcode&0xff));
|
||||
$out.="\t# $memn\t$ops\n"
|
||||
$out.="\t# $memn\t$ops\n";
|
||||
}
|
||||
|
||||
#
|
||||
|
||||
Reference in New Issue
Block a user